| # | Title | Type | Language | |||||||||||
| 1. | Yu Liang - Cal Poly San Luis Obispo Network Latency Measurement for LO Architecture By Logic Analyzer Instrumentation Technique A Senior Project Report Presented to the Electrical Engineering Department California Polytechnic State University San Luis Obispo In Partial Fulfillment of the Requirement for the Degree Bachelor of Science in Electrical Engineering By Yu Guang Liang June 1998 ABSTRACT This goal of this project is to demonstrate a new technique for the measurement of network performance of a |
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