PC755BM8 [Preliminary]

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1. PC755BM8 [Preliminary]

2V PC755BM8 RISC Microprocessor Multichip Package Datasheet Preliminary Specification Features e PC755BMB8 RISC Miprocessor Dedicated 1 megabyte SSRAM L2 Cache Configured as 128K x 72 21 mm x 25 mm 255 Ceramic Ball Grid Array CBGA Maximum Core Frequency 350 MHz Maximum L2 Cache Frequency 175 MHz Maximum 60x Bus Frequency 66 MHz Description The PC755BMB8 multichip package is targeted for high performance space sensitive low power systems and
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1. PC755BM8 [Preliminary]

2V PC755BM8 RISC Microprocessor Multichip Package Datasheet Preliminary Specification Features e PC755BMB8 RISC Miprocessor Dedicated 1 megabyte SSRAM L2 Cache Configured as 128K x 72 21 mm x 25 mm 255 Ceramic Ball Grid Array CBGA Maximum Core Frequency 350 MHz Maximum L2 Cache Frequency 175 MHz Maximum 60x Bus Frequency 66 MHz Description The PC755BMB8 multichip package is targeted for high performance space sensitive low power systems and
PDF Manual ENGLISH


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