# | Title | Type | Language | |||||||||||
1. | Cypress Perform CY7C1394CV18 user manual PERFORM CY7C1392CV18 CY7C1992CV18 CY7C1393CV18 CY7C1394CV18 18 Mbit DDR II SIO SRAM 2 Word Burst Architecture Features 18 Mbit density 2M x 8 2M x 9 1M x 18 512K x 36 300 MHz clock for high bandwidth 2 word burst for reducing address bus frequency Double Data Rate DDR interfaces data transferred at 600 MHz at 300 MHz Two input clocks K and K for precise DDR timing SRAM uses rising edges only Two input clocks for output data |
PDF Manual | ENGLISH | |||||||||||
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